Experience
2 - 7 yrs
Job Location
Hyderabad, India
Vacancy
1
Designation
Sta Engineer
Job Type
Not specified
Job Description
- Thorough knowledge and understanding of static timing analysis concepts.
- Well aware on the STA flow and should be able to build the STA flow independently.
- Should have a strong understanding of Constraints and able to modify and build the constraints with collaboration of RTL and DFT team.
- Well versed with the Block level / SOC level timing closure (STA) methodologies, ECO generation and predictable convergence.
- Should be able to understand the problems occur in in STA due to Physical design and able to provide right feedback to PD team.
- Should have good exposure to high frequency multi voltage design convergence.
- Full exposure to all aspects of STA including: Timing, DRCs, Sanity Checks, Annotation issues, Multivoltage STA flow enablement, Noise, Crosstalk etc.
- Well versed with Tcl/Perl scripting.
- Strong problem-solving skills and communication skills.
- B.Tech/B.E./M.E/M.Tech Degree in Electrical/Electronics science engineering with at least 2+ years of VLSI industry experience in block level or chip level Timing closure Physical Design activities.