Mirafra Technologies

Role & responsibilities Ownership of executing test strategies for one or more Embedded IPs (CPU, GPU, TPU, Peripherals like USB, PCIe, UART, I2C, Memory, Secur

Define the AI architecture strategy spanning data pipelines model selection and deployment for semiconductor design use cases Architect and prototype AIML solut

A minimum of 2 years experience as a C++ software developer. Current knowledge of C++ standards and specifications. Proficiency in OOPS, Data Structure & Algori

Experience in debugging LVS issues at chip-level with complex analog-mixed signal Ips. Experience with design using low-power implementation (level-shifters, isolation cells, power domain/islands, substrate isolation etc.) Experience in physical verification of I/O Ring, corner cells, seal ring, RDL

Roles and Responsibilities : Design, develop, and maintain Linux device drivers for various electronic components and semiconductors. Collaborate with cross-functional teams to identify requirements and implement solutions that meet customer needs. Develop high-quality code that meets industry stand

Job Description Job Description: • Responsibilities include packing RTL files into IP using AMD packaging methodology • Resolving packing level challenges, GUI

Mirafra Software Technologies Pvt Ltd is looking for FPGA Engineer to join our dynamic team and embark on a rewarding career journey Design, develop, and test d

Mirafra Software Technologies Pvt Ltd is looking for Analog Circuit Design Professional to join our dynamic team and embark on a rewarding career journey Design and develop analog circuits for various applications, including amplifiers, filters, and power supplies Perform circuit simulations and ana

Mirafra Technologies is Hiring Design Verification (C/C++) Engineers Location: Hyderabad Experience: 3 to 8 Years Notice Period: 0 to 30 Days Mirafra Technologi

Mirafra Technologies is Hiring! Location: Hyderabad Experience: 3 to 8 Years Send your resume to: swarnamanjari@mirafra.com Role: Design Verification Engineer W

Title: Firmware Security Location: Bangalore EXP: 3 to 8 Description C/C++ development Experience developing embedded firmware on RISC-V, or x86 architectures K

Mirafra Technologies is Hiring FPGA Engineer Location: Hyderabad Experience: 6 to 14 Years Key Responsibilities: Design Register Transfer Level (RTL) IPs for vi

Job Description: Good Experience with Xilinx FPGA. Should be well aware of RTL logic. Well versed with Vivado tool and associated IP Well versed with LUT consid

Job Description: Emulation Model Build Engineer - GPU Location: Hyderabad We are looking for a seasoned Emulation Model Build Engineer with strong experience in

Role & responsibilities Develop, port, and debug bare-metal and RTOS-based firmware for pre-silicon FPGA/emulation platforms (HAPS, ZeBu, or equivalent). Develo

Skill - Memory Characterization Location - Noida Exp - 3 to 5 Availability to join within 0 to 30 days Job Description: Candidate should have worked in memory domain and preferably candidate should have worked on SRAM Memory characterization, design and validation. Candidate should be familiar with