DFT Engineer

MTS Silicon Design Engineer Responsibilities

• Working closely with the Architecture team to understand the DFT Architecture and implementation
• Interfacing with the Design teams to ensure DFT design rules and guidelines are met
• Working with the PD team to ensure to correct DFT implementation and closing timing
• Generating high quality manufacturing test patterns for stuck-at, transition fault models and through the use of on-chip test compression techniques.
• Simulating and verifying the ATPG and LBIST patterns
• Analyzing and working with the different stakeholders to get the required design changes in to get the maximum ATPG coverage
• Working with the Product engineering teams on the delivery of manufacturing test patterns.
• Working with the Product Engineering teams on Silicon bring-up and debugs
• Developing, enhancing and maintaining scripts as necessary

Requirements

• Exposure to DFT Architecture and Design
• Good working knowledge of ATPG tools (Mentor TK)
• Exposure to Static timing analysis Timing closure is required.
• Excellent hands-on debug skills and scripting skills are critical.
• Must have good communication skills and the ability to work in a worldwide team environment.

Qualifications

• B.E/B.Tech/M.E/M.Tech in Electrical/Electronics Engineering with 9+ years of DFT experience

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