Job Description
We are currently seeking an expert SOC Design and Integration Engineer with strong design fundamentals to work in Switch Silicon group. Youll join a group of hardworking engineers to craft and implement the next generation innovative Switch Silicon chips. In this position, youll make a real impact in a dynamic, technology-focused company while developing best high-speed communication devices, delivering the highest throughput and lowest latency!
The Networking Chip Design team in India is a new team which is growing at a fast pace.
What youll be doing:
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You are encouraged to understand all features of a given project and define project milestones based on internal roadmaps, assign them and track them through agile framework
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Define and develop system-level methodologies, tools, and IPs to build SOCs in an efficient and scalable manner.
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Work on SOC Assembly and drive cross-functional teams towards SOC milestone execution.
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Be responsible for integrating all the pieces for a given defined project milestone and deliver the model to relevant teams for further verification at cluster/sub-system/SOC/emulation levels.
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Have good grasp of Perl, Python, or other industry-standard scripting languages.
What we need to see:
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BS (or equivalent experience) / MS with 4+ years of practical semiconductor design and architecture experience building complex SoC s.
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Must have firsthand experience solid understanding of all phases of SOC development in multiple ASIC projects including ASIC architecture, Micro-Architecture, RTL design, verification, timing closure Physical design.
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Exposure to design and verification tools (Verilog/SV or equivalent, Cadence or equivalent simulation tools, debug tools like Indago, GDB etc. ).
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C/C++ programming or python or any other industry-standard scripting language experience desirable.
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Experience working with software teams to tightly define the HW/SW interface including control/status registers, interrupt and error handling.
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Hands on experience in successful tape outs of multiple complex, high-volume SoCs in advanced process nodes.
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Exposure to various Chip Design Functions to be able to collaborate and solve complex cross functional problems.
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Excellent verbal and written communication skills to interact with cross functional teams to build consensus.
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Good teamwork spirit and collaboration skills with team members.
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Experience in synthesis, physical design and DFT is a plus.
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Background in RTL Build and Design Automation is a plus.
Ways to stand out from the crowd:
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Chip lead type of technical leadership experience on delivering complex SOCs for enterprise and/or HPC applications.
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Experience in RTL coding and debug, as well as performance/power/area analysis and trade-offs
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Experience working closely with physical design teams to develop highly optimized ASICs with excellent power, performance and area.
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Strong coding skills in Perl, Python, or other industry-standard scripting languages.
Widely considered to be one of the technology world s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www. nvidiabenefits. com/
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