Senior GPU Memory Subsystem Architect

Contribute to advancing GPU Architecture and Simulators, GPU testing infrastructure, metrics, and/or compilers.

Performance modeling and simulation of features to improve memory system efficiency.

Develop test plans and testing infrastructure.

Debug tests on architecture simulators.

Performance analysis/ bottleneck analysis of sophisticated, Memory subsystem units and features.

Work on hardware models of different levels of extraction, including performance models, RTL test benches and emulators to find performance bottlenecks in the system.

Working with various multi functional teams like ASIC design and verification..

Master/Bachelors degree in Electrical Engineering, Computer Science, Computer Engineering or related field (or equivalent experience).

3+ years experience dealing with system level architecture and performance issues.

Strong programming ability in C, C++. Exposure to Verilog/System Verilog is a strong plus.

Good understanding of Memory subsystem architecture, caches , MMU, memory controller, NOC / interconnects, computer architecture.

Debugging and analysis, including use of RTL dumps to debug failures.

Exposure to performance simulators, cycle accurate/approximate models or emulators for pre-silicon performance analysis is a plus.

Strong communication and interpersonal skills are required along with the ability to work in a dynamic, product oriented, distributed team.

Knowledge of the memory system, caching, interconnects, DRAM controller, Memory management unit, performance modeling and analysis.