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Senior Engineer II - Verification

Microchip Technology
Posted on
Microchip Technology logo

Experience
7 - 9 yrs
Salary (CTC)
₹15.9L - ₹22.8L
Job Location
Chennai, India
Vacancy
1
Designation
Senior Verification Engineer
Job Type
ONSITE

Job Description

Job Responsibilities:
  • Own the verification of complex blocks and subsystems within ARM-based SoCs.
  • Able to perform digital design verification at the Block level, Chip level Functional verification.
  • Define test plans from design specifications, implement constrained-random and directed tests, and drive coverage closure.
  • Development of test environments using System Verilog and UVM verification methodologies.
  • Integration with RTL and basic simulation bring-up for the design.
  • Create multiple test cases as per test plan and launch regressions.
  • Generate Code/Functional coverage, analyze coverage results and correlate with the test plan.
  • Debug RTL and testbench issues, perform root cause analysis, and collaborate with design teams to resolve bugs.
  • Contribute to AI/automation initiatives for regression management, coverage tracking, and debug automation.
  • Work with architects and validation engineers to ensure end-to-end feature completeness and quality.
  • Provide technical guidance and mentorship to junior engineers as required.
  • Continuously improve verification methodology, reuse, and efficiency.
Requirements/Qualifications:
  • Bachelor s 7 9 years of experience in ASIC/SoC functional verification.
  • or Master s degree with 6 to 8 years in Electrical/Electronic Engineering or related field.
  • Strong expertise in System Verilog and UVM methodology.
  • Hands-on experience in developing block/subsystem/SoC-level verification environments.
  • Solid understanding of AMBA,USB,I2C,SPI and eSPI protocols.
  • Good understanding of Digital Design, RTL fundamentals, and simulation/debug flows.
  • Familiarity with scripting (Python/TCL/Perl) for automation.
  • Good programming skills with languages such as C, C++.
  • Experience working with Cadence, Synopsys or Mentor verification platforms is an asset.
  • Exposure to AI/ML-based verification, emulation, or acceleration is a plus.
  • Excellent communication, teamwork, problem-solving abilities, strong analytical and debugging skills.
  • Highly motivated, detail-oriented, and committed to delivering quality results.
  • Ability to lead cross-site teams and manage complex design programs.
Travel Time:
0% - 25%