Job Description
THE ROLE:
The focus of this role is to plan, build, and execute the verification of new and existing features for AMD s graphics processor IP, resulting in no bugs in the final design.
THE PERSON:
You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES:
- Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
- Estimate the time required to write the new feature tests and any required changes to the test environment
- Build the directed and random verification tests
- Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues
- Analyze and enhance legacy test plans to accommodate new Design for Debug feature developments
- Perform debug triage of failures from simulation and emulation environments for CORE and sub-level regressions
- Develop assembly tests, C++ checkers to support new features
- Write complex Perl scripts to update simulation files in a deterministic manner
- Recreate post-silicon failures in pre-silicon environment
- Debug and resolve test cases in assembly language
- Conduct silicon debug and root cause analysis with minimal logging support
- Scope new features and execute comprehensive test planning cycles
- Utilize JTAG protocols for debugging and validation
PREFERRED EXPERIENCE:
- 8+ years of experience in ASIC Design Verification with strong computer architecture knowledge
- Expert-level understanding of CPU architecture, L2/L3 cache architectures, and processor subsystems (x86 or ARM)
- Proficiency in C++ and assembly language programming
- Advanced Perl scripting capabilities
- Deep knowledge of digital design, RTL design, and verification flows
- Strong troubleshooting and analytical debugging skills with ability to debug without logs
- Experience with OOP concepts
- Post-silicon debugging experience preferred
- Ability to quickly adapt to complex infrastructure environments
- Excellent hands-on debug skills and attention to detail
- Proficient in debugging firmware and RTL code using simulation tools
- Experienced with Verilog, System Verilog, C, and C++
- Scripting language experience: Perl, Ruby, Makefile, shell preferred.
- Exposure to leadership or mentorship is an asset
ACADEMIC CREDENTIALS:
- Bachelors or Masters degree in computer engineering/Electrical Engineering
No Referrers Available
There are currently no referrers available for this job. You can still apply, will let you know once there is any referrer available.
