Experience
5 - 10 yrs
Job Location
Kochi, India
Vacancy
5
Designation
Asic RTL Design Engineer
Job Type
Not specified
Job Description
Expertise inSoC subsystem/IP design
Expertise inIP design, Subsystem/Cluster andSoC level integrationusing Verilog/System Verilog
In depth knowledge onRTL quality checks (Lint, CDC)
Good understanding of AMBA bus protocols (AXI, AHB, ATB, APB(RTL Design, RTL Coding & Integration, IP Design, targeted for SOC, Micro architecture, Static checks,ARM Cortex-M7 (CM7),Protocols - PCIe, DDR, Ethernet,I2C, UART, SPI)As per Company Policy
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